《電子技術應用》
您所在的位置:首頁 > 可編程邏輯 > 解決方案 > Cypress CY3275可編程低壓動力線通信開發(fā)方案

Cypress CY3275可編程低壓動力線通信開發(fā)方案

2012-03-23

Cypress公司的CY3275是采用CY8CPLC20 PSoC可編程低壓動力線通信開發(fā)套件,用于低帶寬的動力線通信.CY3275能進行系統(tǒng)設計,在低壓(12-24V AC/DC)動力線上發(fā)送數據高達2400 bps.本文介紹了CY8CPLC20主要特性,PSoC核方框圖,PLC 解決方案框圖,兩個節(jié)點的PLC 系統(tǒng)級方框圖以及CY3275可編低壓PLC開發(fā)套件主要特性,電路圖,材料廠清單和PCB元件布局圖.

CY8CPLC20: Powerline Communication Solution

The CY8CPLC20 is an integrated powerline communication (PLC) chip with the powerline modem PHY and network protocol stack running on the same device. Apart from the PLC core, the CY8CPLC20 also offers Cypress’s revolutionary PSoC technology that enables system designers to integrate multiple functions on the same chip.

CY8CPLC20主要特性:

■ Powerline communication solution

? Integrated powerline modem PHY

? Frequency shift keying modulation

? Configurable baud rates up to 2400 bps

? Powerline optimized network protocol

? Integrates data link, transport, and network layers

? Supports bidirectional half duplex communication

? 8-bit CRC error detection to minimize data loss

? I2C enabled powerline application layer

? Supports I2C frequencies of 50, 100, and 400 kHz

? Reference designs for 110 V/240 V AC and 12 V/24 V AC/DC Powerlines

? Reference designs comply with CENELEC EN 50065-1:2001 and FCC Part 15

■ Powerful Harvard-architecture Processor

? M8C processor speeds to 24 MHz

? Two 8x8 multiply, 32-bit accumulate

■ Programmable system resources (PSoC® Blocks)

? 12 Rail-to-Rail Analog PSoC Blocks provide:

• Up to 14-bit ADCs

• Up to 9-bit DACs

• Programmable gain amplifiers

• Programmable filters and comparators

? 16 Digital PSoC Blocks provide:

• 8 to 32-bit Timers, Counters, and PWMs

• CRC and PRS Modules

• Up to four full duplex UARTs

• Multiple SPI™ masters or slaves

• Connectable to all GPIO Pins

? Complex peripherals by combining blocks

■ Flexible on-chip memory

? 32 KB flash program storage 50,000 erase or write cycles

? 2 KB SRAM data storage

? EEPROM emulation in flash

■ Programmable pin configurations

? 25 mA sink, 10 mA source on all GPIOs

? Pull-up, Pull-down, high Z, strong, or open drain drive Modes on all GPIO

? Up to 12 analog inputs on all GPIOs

? Configurable interrupt on all GPIOs

■ Additional system resources

? I2C slave, master, and multi-master to 400 kHz

? Watchdog and sleep timers

? User-configurable low-voltage detection

? Integrated supervisory circuit

? On-chip precision voltage reference

■ Complete development tools

? Free development software (PSoC Designer™)

? Full-featured in-circuit emulator (ICE) and programmer

? Full-speed emulation

? Complex breakpoint structure

? 128 KB trace memory

? Complex events

? C Compilers, assembler, and linker

圖1.Cypress PLC 解決方案框圖

圖2.CY8CPLC20 PSoC核框圖

CY3275可編低壓PLC開發(fā)套件

Cypress’s Powerline Communication (PLC) solution makes it possible to transmit command and control data over high-voltage and low-voltage powerlines. This solution is developed for low bandwidth powerline communication.

The CY3275 Programmable Low Voltage Powerline Communication Development Kit is a tool to do system design using the ability of the CY8CPLC20 devices to transmit data up to 2400 bps over Low Voltage (12-24V AC/DC) Powerlines.

CY3275可編低壓PLC開發(fā)套件主要特性:

User friendly PLC Control Panel application available on the kit CD-ROM

Chip power supply derived from 12V to 24V AC/DC

CY8CPLC20-OCD chip -- 100-pin TQFP on chip debug (OCD) device that allows for the quick design and debug of PLC applications

User configurable general purpose LEDs

General purpose 8-bit DIP switch

RJ45 connector to use ICE debugger

RS232 COM port for communication

Header to attach LCD card

I2C header for communicating to external devices

ISSP header for programming the CY8CPLC20 chip

CY3275可編低壓PLC開發(fā)套件包括:

CY3275 PLC LV development board

CY3275 Quick start guide

CD-ROM containing:

Packet Test software – PLC Control Panel application

CY8CPLC20 data sheet

User guide

Application note – Using CY8CPLC20 in Powerline Communication (PLC) Applications

CY3275 board schematics

CY3275 board Gerbers

PSoC Designer

PSoC Programmer

12V DC power supply

MiniProg1 for programming the CY8CPLC20 device

25 Jumper wires

LCD module

USB-I2C Bridge

Retractable USB cable

Daisy chain cable

Five CY8CPLC20-28PVXI Device Samples

圖3.PLC 系統(tǒng)級方框圖-兩個節(jié)點

圖4.CY3275可編低壓PLC開發(fā)板外形圖

圖5.CY3275可編低壓PLC開發(fā)板電路圖:用戶接口

圖6.CY3275可編低壓PLC開發(fā)板電路圖:發(fā)送和接收濾波器耦合

圖7.CY3275可編低壓PLC開發(fā)板電路圖:電源

CY3275可編低壓PLC開發(fā)板材料清單:




圖8.CY3275可編低壓PLC開發(fā)板元件布局圖
詳情請見:
http://www.cypress.com/?docID=30115

http://www.cypress.com/?docID=32000



本站內容除特別聲明的原創(chuàng)文章之外,轉載內容只為傳遞更多信息,并不代表本網站贊同其觀點。轉載的所有的文章、圖片、音/視頻文件等資料的版權歸版權所有權人所有。本站采用的非本站原創(chuàng)文章及圖片等內容無法一一聯(lián)系確認版權者。如涉及作品內容、版權和其它問題,請及時通過電子郵件或電話通知我們,以便迅速采取適當措施,避免給雙方造成不必要的經濟損失。聯(lián)系電話:010-82306118;郵箱:aet@chinaaet.com。
主站蜘蛛池模板: 小泽玛利亚国产在线视频| 欧美精品第1页在线播放| 日本在线观看www| 亚洲视频小说图片| 国产精品入口在线看麻豆| 日本精品少妇一区二区三区| 四虎影视884aa·com| 一边摸一边叫床一边爽| 污视频软件大全| 国产精品99久久久久久人| 一级毛片免费不卡| 日韩成人在线免费视频| 午夜视频久久久久一区| 97精品在线观看| 星空无限传媒在线观看| 听了下面湿透的娇喘音频| jizz性欧美12| 成年人在线免费看视频| 亚洲免费人成在线视频观看| 男生插入女生下面视频| 国产乱色在线观看| 中文字幕的电影免费网站| 男人j桶进女人免费视频| 国产精品v片在线观看不卡| selaoban在线视频免费精品| 日本伊人精品一区二区三区| 亚洲国产精品一区二区第四页| 超碰97久久国产精品牛牛| 国产精品日韩欧美久久综合| 久久精品人人做人人爽电影蜜月| 精品无码成人久久久久久| 国产综合色在线视频区| 久久免费观看国产精品| aaaa级毛片| 领导边摸边吃奶边做爽在线观看 | 日韩av一中美av一中文字慕| 出包王女第四季op| 顶级欧美妇高清xxxxx| 国产精品国色综合久久| 中文字幕亚洲综合久久综合| 欧美日韩成人在线观看|