《電子技術應用》
您所在的位置:首頁 > 嵌入式技術 > 解決方案 > Freescale MM912F634汽車繼電器驅動和LIN連接解決方案

Freescale MM912F634汽車繼電器驅動和LIN連接解決方案

2012-01-15

Freescale公司的MM912F634是S12 MagniV系列產品中一員,集成了link" href="http://m.xxav2194.com/tags/繼電器" title="繼電器" target="_blank">繼電器驅動以及LIN收發器.器件采用16位S12 CPU,具有32KB閃存和2.0KB RAM,背景調試(BDM)和調試模塊(DBG),帶SCI的LIN 2.1物理層接口,10位15通路的ADC,16位4通路的定時器模塊(TIM16B4C),8位2路PWM,六種高壓/叫醒輸入和三個低壓GPIO,主要用在汽車的門窗提升和座位控制以及LIN連接.本文介紹了MM912F634主要特性,方框圖,簡化應用電路以及評估板KIT912F634EVME主要特性,電路圖和材料清單(BOM).

The MM912_634 is part of the S12 MagniV portfolio which simplifies system design with easy-to-use, expertly integrated mixed-signal microcontrollers for automotive applications. This dual-die solution is built on proven S12 technology, enabling software and tool compatibility across the entire portfolio. The SMARTMOS-based analog die combines System Basis Chip (SBC) functionality and application specific functions, which include a Local Interconnect Network (LIN) transceiver, relay drivers, a DC motor current sense circuit, and a selection of high and low side digital I/O. Control of the analog die is via a new high performance internal Die to Die interface (D2D), which seamlessly integrates the analog IC registers into the MCU register map, to provide faster access than SPI based systems.

The MM912F634 is an integrated single package solution that integrates an HCS12 microcontroller with a SMARTMOS analog control IC. The Die to Die Interface (D2D) controlled analog die combines system base chip and application specific functions, including a LIN transceiver.

MM912F634主要特性:

• 16-Bit S12 CPU, 32 kByte FLASH, 2.0 kByte RAM

• Background Debug (BDM) & Debug Module (DBG)

• Die to Die bus interface for transparent memory mapping

• On-chip oscillator & two independent watchdogs

• LIN 2.1 Physical Layer Interface with integrated SCI

• Six digital MCU GPIOs shared with SPI (PA5…0)

• 10-Bit, 15 Channel - Analog to Digital Converter (ADC)

• 16-Bit, 4 Channel - Timer Module (TIM16B4C)

• 8-Bit, 2 Channel - Pulse width modulation module (PWM)

• Six high voltage / Wake-up inputs (L5.0)

• Three low voltage GPIOs (PB2.0)

• Low Power Modes with cyclic sense & forced wake-up

• Current Sense Module with selectable gain

• Reverse Battery protected Voltage Sense Module

• Two protected low side outputs to drive inductive loads

• Two protected high side outputs

• Chip temperature sensor

• Hall sensor supply

• Integrated voltage regulator(s)

MM912F634目標應用:

Automotive:Doors, Window Lift and Seat Control

Connectivity :Local Interconnect Network (LIN)


圖1.MM912F634方框圖

圖2.MM912F634電源電路圖

圖3.MM912F634簡化應用電路圖

評估板KIT912F634EVME

Freescale Semiconductor’s KIT912F634EVME is a system solution which gives the user the capability to easily evaluate most of the features provided by the MM912F634 - Integrated Dual Low Side and Dual High Side Switch with Embedded MCU and LIN Transceiver for Relay Drivers. The 912F634 features 2 die in a single package. The 16-bit core and the analog die are connected by means of the Die to Die interface that provides direct address access to the registers on the analog die. The analog die contains HS and LS switches, as well as a PWM module, ADC module, timer module, SCI module, LIN physical interface, and other general registers. All external signals are accessible via header connectors, and most of the signals can also be checked via test points. The evaluation module board also includes the TBDML programming/debugging interface, so no external interface is needed. The board can be powered either from two 4.0 mm banana connectors or from the LIN connector. For quick familiarization with the device, a graphical user interface, based on FreeMASTER software, is provided together with the module. Thanks to the GUI, the user can easy evaluate the peripheral modules, or directly access the registers on the analog die.

評估板KIT912F634EVME主要特性:

•16-Bit S12 CPU, 32 kByte FLASH, 2.0 kByte RAM

•Background Debug (BDM) & Debug Module (DBG)

•Die to Die bus interface for transparent memory mapping

•On-chip oscillator & two independent watchdogs

•LIN 2.1 Physical Layer Interface with integrated SCI

•Six digital MCU GPIOs shared with SPI (PA5…0)

•10-Bit, 15 Channel - Analog to Digital Converter (ADC)

•16-Bit, 4 Channel - Timer Module (TIM16B4C)

•8-Bit, 2 Channel - Pulse width modulation module (PWM)

•Six high voltage / Wake-up inputs (L5.0)

•Three low voltage GPIOs (PB2.0)

•Low Power Modes with cyclic sense & forced wake-up

•Current Sense Module with selectable gain

•Reverse Battery protected Voltage Sense Module

•Two protected low side outputs to drive inductive loads

•Two protected high side outputs

•Chip temperature sensor

•Hall sensor supply

•Integrated voltage regulator(s)

 
圖4.評估板KIT912F634EVME外形圖

圖5.評估板KIT912F634EVME電路圖(1)

圖6.評估板KIT912F634EVME電路圖(2)

評估板KIT912F634EVME材料清單(BOM):




圖7.評估板KIT912F634EVME元件布局圖
詳情請見:
http://cache.freescale.com/files/analog/doc/data_sheet/MM912F634.pdf?fpsp=1&WT_TYPE=Data%20Sheets&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation

http://cache.freescale.com/files/analog/doc/user_guide/KT912F634UG.pdf?fpsp=1&WT_TYPE=Users%20Guides&WT_VENDOR=FREESCALE&WT_FILE_FORMAT=pdf&WT_ASSET=Documentation



本站內容除特別聲明的原創文章之外,轉載內容只為傳遞更多信息,并不代表本網站贊同其觀點。轉載的所有的文章、圖片、音/視頻文件等資料的版權歸版權所有權人所有。本站采用的非本站原創文章及圖片等內容無法一一聯系確認版權者。如涉及作品內容、版權和其它問題,請及時通過電子郵件或電話通知我們,以便迅速采取適當措施,避免給雙方造成不必要的經濟損失。聯系電話:010-82306118;郵箱:aet@chinaaet.com。
主站蜘蛛池模板: 宅男666在线永久免费观看| 欧美激情视频一区二区三区| 国产日韩精品视频| www.一级毛片| 香焦视频在线观看黄| 天堂中文资源网| 久久久久久久99精品免费观看| 欧美老熟妇乱大交XXXXX| 四虎成人永久影院| 日韩在线第二页| 天天做天天摸天天爽天天爱| 久久久久亚洲AV无码专区体验| 欧美成人a人片| 免费看a级黄色片| 2018国产大陆天天弄| 暖暖免费中国高清在线| 国产三级网站在线观看播放| 800av凹凸视频在线观看| 成人动漫h在线观看| 久久综合久久久久| 永久免费无码网站在线观看| 午夜视频在线观看国产| 91精品啪在线观看国产线免费| 成人综合激情另类小说| 乱系列中文字幕在线视频| 激情综合网五月| 又爽又黄又无遮挡网站| 风间由美性色一区二区三区| 国产精品天天干| WWW四虎最新成人永久网站| 成人永久免费福利视频app | 免费一区区三区四区| 色噜噜人体337p人体| 国产成人精品午夜视频'| 3d动漫精品啪啪一区二区免费| 日本特黄a级高清免费大片| 亚洲图片激情小说| 瑟瑟网站免费网站入口| 又色又爽又黄的视频网站| 韩国公和熄三级在线观看| 国产精品99久久免费|