中圖分類號： TP309
文獻標識碼： A
DOI：10.16157/j.issn.0258-7998.212073
中文引用格式： 蘇振宇，徐崢，劉雁鳴. SoPC安全啟動模型與設計實現(xiàn)[J].電子技術應用，2021，47(12)：22-25，30.
英文引用格式： Su Zhenyu，Xu Zheng，Liu Yanming. Design and implementation of SoPC secure startup model[J]. Application of Electronic Technique，2021，47(12)：22-25，30.

Design and implementation of SoPC secure startup model

Abstract： Concerning the security threats such as firmware tampering and malicious code implanting in the startup process of system on a programmable chip(SoPC), a secure startup model is proposed. The model takes boot ROM as the trust root, and the public key algorithm and symmetric cipher algorithm are used to sign the firmware in each phase of the startup process. The digital signature value of each firmware image is verified in turn after SoPC is powered on, so as to establish a complete trust chain. In the implementation stage, the model is designed and verified by using Intel field programmable gate array(FPGA) development platform, and two secure boot modes are realized. The results show that the model can be applied to chip development to meet the requirement of secure startup.

Key words : system on a programmable chip；secure startup；field programmable gate array；digital signature；firmware